This invention describes an automated Load Pull test setup, which allows controlling and optimizing not only, as existing load pull setups do, the RF impedances seen by the DUT, but also, at the same time, the low frequency impedances, at baseband frequency range, generally presented to the DUT by the DC biasing networks. Bias networks are, in general, not part of the amplifier design considerations, beyond the fact that they are supposed to allow RF signal to pass through with as low insertion loss as possible, and DC bias to pass through to the power supply, again with as low series ohmic resistance as possible. Typical LC bias networks, also called Bias Tees, are shown in FIGS. 5, 8. The only RF consideration for the DC path of Bias Tees to date has been amplifier stability: since transistors have higher gain at low frequencies down to baseband frequencies, risk of spurious oscillations due to inadequate biasing networks needs to be eliminated. This, in general, is attempted to and often achieved, using a dump resistor connected in parallel at the input port (gate or base) of the transistor (DUT).